update instruction reference for mfd0816
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@ -6,6 +6,7 @@ CONTENTS
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1.... INSTRUCTION LISTING
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2.... INSTRUCTION SPECIFICATIONS
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3.... REGISTER ENCODING
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..... LICENSE
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1. INSTRUCTION LISTING
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@ -136,33 +137,33 @@ CONTENTS
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0x00 ADC <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Adds the value of ACL with the first operand and the carry flag and stores
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the result in ACL. SF is modified to indicate if the result is
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Adds the value of AR with the first operand and the carry flag and stores
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the result in AR. SF is modified to indicate if the result is
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signed (SF = 1) or unsigned (SF = 0). Sets CF on carry for unsigned math,
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OF on overflow for signed math and NF flag to indicate the sign of the
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signed result. Sets ZF if the result is 0 (ACL = 0 && CF = 0 && OF = 0).
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signed result. Sets ZF if the result is 0 (AR = 0 && CF = 0 && OF = 0).
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The first operand can be immediate, register immediate, direct,
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register direct, indirect or register indirect.
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Operation:
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ACL := ACL + Operand1 + CF;
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AR := AR + Operand1 + CF;
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0x01 ADD <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Adds the value of ACL with the first operand and stores the result in ACL.
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Adds the value of AR with the first operand and stores the result in AR.
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Sets the NF flag to indicate the sign of the signed result.
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Sets CF on carry for unsigned math, OF on overflow for signed math and the
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NF flag to indicate the sign of the signed result. Sets ZF if the result
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is 0 (ACL = 0 && CF = 0 && OF = 0).
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is 0 (AR = 0 && CF = 0 && OF = 0).
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The first operand can be immediate, register immediate, direct,
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register direct, indirect or register indirect.
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Operation:
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ACL := ACL + Operand1;
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AR := AR + Operand1;
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Carry and Overflow example:
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@ -172,13 +173,13 @@ CONTENTS
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0x02 AND <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Executes a logical AND with the current value of ACL and the first operand.
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The result is then stored in ACL. Sets ZF if the result is 0, clears OF and
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Executes a logical AND with the current value of AR and the first operand.
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The result is then stored in AR. Sets ZF if the result is 0, clears OF and
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CF.
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Operation:
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ACL := ACL & Operand1;
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AR := AR & Operand1;
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0x03 BIN <r/imm/m> <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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@ -191,7 +192,7 @@ CONTENTS
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Operation:
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for i := 1 to ACL do
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for i := 1 to AR do
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io_read(Operand1 + i - 1, Operand2);
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end
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@ -206,7 +207,7 @@ CONTENTS
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Operation:
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for i := 1 to ACL do
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for i := 1 to AR do
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io_write(Operand1 + i - 1, Operand2);
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end
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@ -246,32 +247,32 @@ CONTENTS
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0x09 DIV <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Divides the value of ACL by Operand 1 as an unsigned value and stores the
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result in ACL.
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Divides the value of AR by Operand 1 as an unsigned value and stores the
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result in AR.
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Operand 1 can be immediate, register immediate, direct, register direct,
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indirect or register indirect.
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Operation:
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ACL := ACL / Operand1;
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AR := AR / Operand1;
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0x0a IDIV <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Divides the value of ACL by Operand 1 as a signed value and stores the
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result in ACL.
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Divides the value of AR by Operand 1 as a signed value and stores the
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result in AR.
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Operand 1 can be immediate, register immediate, direct, register direct,
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indirect or register indirect.
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Operation:
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ACL := ACL / Operand1;
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AR := AR / Operand1;
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0x0b IMUL <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Multiplies the value of ACL by Operand 1 as a signed value and stores the
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result in ACL. CF and OF are set if the most signficant bit,
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Multiplies the value of AR by Operand 1 as a signed value and stores the
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result in AR. CF and OF are set if the most signficant bit,
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including the sign bit, are carried over into AH. If the result fits into
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AL, CF and OF are cleared.
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@ -280,9 +281,9 @@ CONTENTS
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Operation:
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ACL := ACL * Operand 1;
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AR := AR * Operand 1;
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if ACL = AL then
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if AR = AL then
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CF := 0;
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OF := 0;
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else
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@ -496,8 +497,8 @@ CONTENTS
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0x1d MUL <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Multiplies (unsigned) the value of ACL by Operand 1 and stores the result in
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ACL. If the result fits into ACL, CF and OF are cleared otherwise both get
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Multiplies (unsigned) the value of AR by Operand 1 and stores the result in
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AR. If the result fits into AR, CF and OF are cleared otherwise both get
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set.
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Operand 2 can be immediate, register immediate, direct, register direct,
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@ -534,14 +535,14 @@ CONTENTS
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0x21 OR <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Performs a logical OR with the value of ACL and Operand 1 and stores the
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result in ACL.
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Performs a logical OR with the value of AR and Operand 1 and stores the
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result in AR.
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Operand 1 can be direct, register direct, indirect or register indirect.
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Operation:
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ACL := ACL or Operand1;
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AR := AR or Operand1;
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0x22 OUT <r/imm/m> <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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@ -715,11 +716,11 @@ CONTENTS
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0x4b SUB <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Subtracts the value indacted by Operand 1 from the value of ACL and stores
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the result in ACL.
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Subtracts the value indacted by Operand 1 from the value of AR and stores
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the result in AR.
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Sets CF on carry for unsigned math, OF on overflow for signed math and the
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NF flag to indicate the sign of the signed result. Sets ZF if the result
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is 0 (ACL = 0 && CF = 0 && OF = 0).
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is 0 (AR = 0 && CF = 0 && OF = 0).
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Operand 1 can be immediate, register immediate, direct, register direct,
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indirect or register indirect.
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@ -735,19 +736,19 @@ CONTENTS
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Operation:
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ANDSetFlags(ACL & Operand1);
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ANDSetFlags(AR & Operand1);
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0x4d XOR <r/imm/m>
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‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾
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Executes a XOR operation on the value of ACL with the value indicated by
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Operand 1. Stores the result in ACL.
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Executes a XOR operation on the value of AR with the value indicated by
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Operand 1. Stores the result in AR.
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Operand 1 can be immediate, register immediate, direct, register direct,
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indirect or register indirect.
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Operation:
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ACL := ACL ^ Operand1;
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AR := AR ^ Operand1;
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LICENSE
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────────────────────────────────────────────────────────────────────────────────
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